Download the presentation: Annual Update on New Memory Technologies
00:16 Mark Webb: So, I'm going to give an update on emerging memories for this conference. Our focus, unlike previous presentations where I've done this, is going to be on data center applications and not every possible application you could have for emerging memories. Again, my name is Mark Webb, and I am at MKW Ventures Consulting, and you have my contact information.
So, the topics we'll cover is, why new memories; historical and recent technologies compared; memory product lifecycle, which it turns out is important to decide where we are with some of these technologies; we'll talk about PCM phase-change memory, Optane, 3D XPoint which are all kind of the same; talk about MRAM, resistive RAM and ferroelectric RAM. One of the things we'll talk about here is we'll move . . . I want to move the discussion from emerging memories to emerged technologies. Which ones are already coming out there? Which ones can we use today? And then we'll talk about what should be the focus for the data center.
01:21 MW: We look at memory technologies, we look at . . . We have a bunch of different technologies we can look at and they have different attributes that are useful and different tradeoffs. So, if we look at the two historical ones, DRAM and NAND, you can see there are big tradeoffs on latency and cost on those two technologies, and where they're typically used. If we look at the other technologies, one of the things that has changed is 3D XPoint is now on high-volume production, and MRAM has moved into production both in discrete at higher densities, and also is being used by multiple foundries. So MRAM has also increased its HBM capability. The other technologies listed on here are -- resistive RAM, nanotube RAM and ferroelectric RAM -- those actually have not progressed as much. We don't have any high-volume products on there that are higher density, and so those are pretty much unchanged since last year.
02:21 MW: So, when we look at why new memories, one of the things we look at is NAND scaling and can NAND continue to scale. The NAND flash has line of sight to 256 layers plus and QLC. This takes us to the 2025 time frame with about a 75% bit cost reduction. So, as a result, if you look, we can scale and add many more layers, add a lot of density, get massive, very large, big cost reduction, and we can do that just with what we know today on technologies. We can do greater than 1 terabyte chip today, we can do two terabytes in a package. The sweet spot today is 256 to 512 gigabits, so density is not our issue that we're trying to address at this time. String stacking, CMOS under the array allows a lot of different circuit options. So, NAND is not done anytime soon, and no one is even close on costs. NAND is still four to five times more expensive than HDD, but it's improving over time. So, NAND clearly is the high density, low-cost solution for all computer applications. That's the one you want to go to if that's what you look for is high density, low cost.
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03:39 MW: If we look at new memories, look at DRAM scaling. DRAM scaling has slowed down significantly, but it is still steady. Companies are implementing EUV and pitch multiplication to get to 10 nanometers. One of the issues people thought was you wouldn't be able to scale below, say, 20 nanometers or 18 or 16 nanometers . . . All companies have proposals on how to get basically to 10 nanometers. They do that in different ways. Samsung and SK Hynix are talking about EUV, Micron's talked about pitch multiplication, that's just optimized based on what their sweet spots are as a manufacturing technology. However, all companies have line of sight to get there, and I believe all companies have literally proposed and shown some details on what they plan in the next five to six years to get to the next three generations of technology.
04:33 MW: New architectures could work if needed, but there's no major change yet. All companies have options they can do if they needed to -- I like to call them tricks -- to improve density or make tradeoffs or things they need to do to improve the technology. DDR5 is on track to lead bus speed improvement, so it's another one. For a while there, we weren't sure we'd have a DDR5; we weren't sure if we were going to get bus speed improvements. DDR5's on track now, so we expect to get speed improvements, power improvements from DRAM technologies going forward. So, that's something that's kind of new or at least higher confidence than it was a year or two ago. So, DRAM has line of sight through 2026 for scaling, there's no issue seen there.
05:18 MW: Ten percent cost reduction and 25% density improvement each year is what I have in my model. And again, 10% cost reduction is not earth-shattering. For 10%, you're not going to take huge risks, but it is something you can continuously do, and as soon as you see that 10% delivered, you can convert to that new technology.
So, DRAM is still the go-to for fast volatile random access memory. When you want fast memory, DRAM is what you're going to go for in any computer application. So, why is new memory not meeting needs? So, the issue that really drives a lot of these new technologies is DRAM and NAND are not meeting needs. NAND is slow, block-oriented and wears out, but nothing can approach it for price. DRAM is volatile, density is growing slowly, it's less than ideal, but at least it's RAM, so it's random access and it doesn't wear out. So, anytime you have something that you know you're going to be cycling a ton, you need high speed, you need random access, DRAM is the one you use for that, and then you can combine it with NAND in various applications. What we want, though, from a new technology is we want a fast non-volatile memory, and we want a higher density random access memory than DRAM, so those are two things that we're looking to get from these new technologies.
06:43 MW: So, what's needed in new technology? The ideal universal memory would be as fast as DRAM, non-volatile, infinite cycles, cheaper than NAND. This is not coming from anyone soon or probably ever. Nothing is replacing DRAM or NAND in the next 10 years. So, saying, "What is the next technology that's going to replace them?" Nothing is replacing them; it's not even being proposed. The reality of what will happen is we'll have a combination of tradeoffs that'll need to be made, and that's kind of on the NAND-DRAM side and various computer architectures. But what this presentation is about is adding in some new technologies to fill the gaps that allow us to improve our compute power.
So this is a graph I've shown before, and the key here is when we we're looking at new memories -- we looked at the latency spectrum and gaps -- and back in 2015, when we looked at it, our big issue was what we called the gap and we said, "We need something in between DRAM and NAND that's like a memory," it's called persistent memory or storage class memory, and we had a huge area of latency that was not covered.
07:53 MW: If you look at it though, today and into the future, this gap doesn't exist. We have technologies that fill that gap -- we have MRAM, NAND plus DRAM DIMMs, fast NAND SSDs, 3D XPoint SSDs, XPoint DIMMs, resistive RAM -- so we have lots of technologies that can fill that gap, and then it fills out the entire spectrum here. And then if you look at it from the left to the right, you go into increasing density, so you get a much higher density all the way up to tape, and then for that same thing, though, it keeps getting slower. So, then going to the left, you see increasing cost; again, it gets very fast all the way down to CPU SRAM, but the idea is that there's increasing costs there. But the key thing here is that the gap itself is gone if we just start filling in these new technologies that I mentioned here. So, what do we have available today? We now have a volume 3D XPoint memory, ramping with hundreds of millions in revenue in multiple markets, that's more revenue than all previous new NVM combined. So, again, while I talk about 3D XPoint and we say it should ramp faster, it is a huge memory, very dominant. This is a huge change that's happened.
09:14 MW: I did a calculation of . . . we should expect to see 1 billion gigabytes will be shipped in 2021. We have low-density resistive RAM, ferroelectric RAM technologies that are available for embedded, we have MRAM being used in actual discrete products and applications now, and there's multiple providers of this, so you can get MRAM from multiple companies for discrete products and use them. We have MRAMs being implemented in foundry designs by all major players, so if you just take MRAM alone, you now have discrete products available, widespread up to, I believe, Everspin has a gigabit product, and then you have foundries, if you want it embedded, multiple foundries, you can take your choice of, will embed, use MRAM to embed memory in your chip.
We have new memories being proposed, but things have changed since 2019, in my opinion. The focus and money will move to the growth of emerged technologies and away from finding new technologies. We need to focus on . . . We have these technologies, we need to . . . And this is both a prediction and a call to action . . . We need to focus the money and the effort on getting these technologies into applications.
10:36 MW: So, the question is, what technologies are available, where are they in the development lifecycle, how far from reality are they? The memory product lifecycle that I've shown before separates what is real versus what is a hope for some day in the future. So, if you look overall at the lifecycle, it has two parts: part one and part two. Part one is research phase, which covers stages one through five. You can look at all the details offline, we'll go through it a little bit. And then you have part two, which is product stage, for developing a new memory technology, and it covers stages six to 10. Each of these stages is about four to five, each of these . . . sorry, parts, is about four to five years.
So, as a result, you can see from the time we propose a concept to the end, it's eight plus years of the technology, and you have to go through all these steps or you can't move forward. If we look at part one, technical proof, open communication, you go from a concept, you propose a new operation theory, then you create a cell structure to validate the theory, you create multiple cells, obtain feedback and analysis, does it really work? Then you create a larger array -- it might be 64 kilobits to a megabit with the ability to read, stress, write cycle -- does the whole array work? And then you do it; basically, you publish a report on the speed, disturbs, failure modes, programming algorithms, and show a cross-section.
12:03 MW: And you need to do all this to really find out -- can you design? Because many, many products -- probably 90% plus of technologies -- fail before they get to the end of this first part or phase five. The end result would be a working technology, fully demonstrated, checked out. You would publish the document -- it doesn't need to be on leading nanolithography -- but it should be fully capable, you publish it with pictures, TEMs, SEMs, and again, this is all done four to five years after concept. This is an example of something . . . what you have to do to get out of that research phase.
Once you're out of the research phase, you get into part two, which I phrase as, "We're going to build a product." You get approval for a potential product, internal or with a partner, you choose a node to put it on, you develop internal applications with a partner, show the value add, you sample some customers under NDA or open, do they want it? You look at variability, cost yields, new fail modes, is there a showstopper here? Is there something that makes it so you can't do it? You also start rev 2 and then you qualify rev 1 and start selling it for revenue, and you put rev 2 into development.
13:19 MW: The key takeaway here is, this is seven to eight years from concept, assuming no restarts or resource limitations from concept to revenue shipments. This second part is often performed in stealth mode, presentation starts to disappear. I was talking with somebody and they were talking about how 3D XPoint was this surprise. 3D XPoint was published every single year up until about 2012, then it disappeared because Intel Micron were working on real products. So, then what happens is it disappears, you go into stealth mode, the next announcement after that is samples or early production, which is what has happened with MRAM technologies and XPoint technologies. So again, you can kind of see this happen over and over again with different technologies.
So, where are emerging technologies today? I was looking at recent "EE Times article" and it said, "Emerging memories may never go beyond niche applications," so I said, and looking at stealing from a quote from that article, I said, "Let's have the tough discussion based on the memory product lifecycle of where these technologies are." We want to talk about non-niche technologies, my definition of niche is less than 1% of the market long term is what you're focusing on.
14:40 MW: The memory product lifecycle clearly shows the possibility of stealth products, so it's possible that Apple, Samsung, WDC, Micron could be working on items with no knowledge by analysts like me. However, typically, that only happens after someone has demonstrated a small array of material, then it goes into a stealth mode and disappears.
The 3D XPoint example which I already gave is a good example of that, where again, it was shown in many arrays and then it suddenly came back again as a full product. So, if we look at technologies in the research stages, these are at least five years from production, probably 10 years, and if you look at all the technologies over time, there's probably a 90% chance that none of these ever make it to revenue production. You have high density, we'll say 100 gigabit plus resistive RAM that's currently in stage four, they're basically looking to build the mini-arrays, develop the technology. There's many flavors and options, but really no advantage over PCM at this point or a 3D XPoint and a lack of products in the last two years is troubling.
15:51 MW: In my opinion, I was looking at some things, it looks like we're finding issues as fast as we are solving them. Ferroelectric is in for high density. Again, there's ferroelectric low density, that's in stages three and four, again, building multiple cells and building mini-arrays, looking at how they work, you see that published at IBM each year. One caveat to ferroelectric is, if you look at the technology, how it's built, it has a great potential to integrate into a memory process with . . . we'll say relatively few changes.
So, as a result of that, it is our top potential for stealth development with memory companies. I firmly believe that a couple of major memory companies are looking at ferroelectric RAM and implementing them into a DRAM-like process where they can put them in, but again, that's all stealth and that won't come out until there's a product. But for right now, the stuff you see being published is really in stage three and four, they're pretty much getting ready to build some arrays and publish the data on those. Nanotube RAM is stage three. They built individual cells and clusters of cells, but we haven't seen any demonstrated ability in a large array or characterizations on disturb rates, failure rates, error rates, charge retention data.
17:13 MW: This assessment that I have of it being in stage three would change if we see array characterizations or demonstrations shown to the public. Also, we haven't seen any products come out. They were promised over the last couple of years, and we haven't seen anything there, so we're assuming it's in stage three, which is kind of typical, until you get to the point where you're building a larger array.
If you look at other technologies like DNA, molecular, other technologies, those are in stage two. They have a concept, they're building individual cells, they're looking at what works, they haven't gotten to the point where they're going to build many arrays. These need to leave research study, typically university studies, before they can move into any kind of production, and again, these are probably 10-15 years away from production.
18:01 MW: If we look at technologies in the product stages, six to 10, we have a couple of things here, discrete MRAM up to 1 gigabit is stage 10. It's shipping for revenue. Embedded MRAM today is probably stage eight. Companies are working on samples, they're doing development, they'll be products probably in -- if they're not already out -- in the next year or two, so those are very close to shipping for revenue. We have resistive RAM embedded in low density, maybe 1 megabit. That's in stage 10, that's production, you can get that today. We have ferroelectric embedded in low density. Again, that's stage 10, that's available today, but it's very low density. And then we have resistive RAM embedded, we'll say, medium density. This is the so-called 1T1R in 8 megabit arrays, and I said this is in stage six to seven, which means it's being developed into technologies or trying to put into products and see which product needs it, but it is not yet sampling, and it's in partnership development for multiple companies and foundries, so those are technologies that are in mass production or heading towards mass production in our later product stages. These are what we should be focused on.
19:15 MW: Of course, the next one is . . . Oh, I'm sorry, I'm going through all the resistive RAM, MRAM. So, in resistive RAM, we have a lot of new developments, low-density resistive RAM characterization and opportunities for embedded were presented at IBM by multiple companies. That's great for learning MRAM. We have new MRAM products from Everspin and others are available. MRAM, we have characterization from Intel, Samsung, TSMC and GlobalFoundries presented, and then on MRAM we have improved transistor design and reliability improvements presented from IP companies where they're saying, "Here's how we can help solve some of the problems that are with MRAM."
MRAM, I was just looking at recent papers, we've seen cell scaling of about 30% in the last two years, as a side note onto this, that turns out the cell is dominated by the drive transistor not by the actual storage node in most technologies, but there's a lot of improvement that's been made. And then MRAM revenue we're predicting is going to be about $100 million for discrete, I can't talk to embedded because it's hard to model that, but for discrete, in 2022.
20:25 MW: If we look at . . . 3D XPoint is obviously the major technology that's in product stages, so 3D XPoint PCM Optane is 128 gigabit plus, it's in stage 10, it's available in multiple high-volume products from Intel, it's available in SSDs and persistent memory today, Micron is developing products. We have a second generation that's ramping now with products coming out this year -- the revenue estimate I have is greater than $1 billion in 2020 and $3.6 billion in 2024. We'll expect to see 1 billion gigabytes to be shipped in 2021. It's faster than NAND, slower than DRAM, lower cost than DRAM, more expensive than NAND. So, again, it's not replacing anything, but it does fill that gap and it provides a lot of power to people who are looking to create new architectures. This is 90% of the revenue of all emerging memories today. I just put in a graph there from another presentation. If you look at the revenue we're projecting for 3D XPoint going forward, in 2020, if you take total revenue that's coming in, it's expected to be $1.1 billion this year, $1.75 billion in 2022 and $3.6 billion in 2024.
21:51 MW: A couple of caveats on this that you can see in the graphs if you dig to the details, and I can talk more about them later, but the key is that the 3D XPoint, the DIMM, the persistent memory is what the key application is. And while it is growing and it will continue to grow, I'm expecting to see the real takeoff and inflection point to be when we get a new bus, expected to be a CXL bus, which allows a simpler interface, a more generic interface rather than being custom, so you don't have to be like Intel BA own the memory controller unit in order to get the technology to work. So, I'm expecting a big takeoff in about 2023 with the CXL bus that will allow this to become more widespread use. Actually, there's a build here -- this is what the numbers I had before, they've come down from what I presented before, but again, still very dominant numbers, very high compared to other new technologies.
22:57 MW: So, the summary of emerged technologies for data center. If you need 1 megabit to 1 bit gigabit, a fast non-volatile memory with a cell size of about 30 to 50 F², which is about 0.03 microns to 0.05 microns² for embedded or discreet, MRAM is ready to implement and develop products around today. And again, that's fast NVM technology that you can implement in many different applications. If you want lower density memory for implementation, less than 1 megabit, you have resistive RAM and even some ferroelectric RAM is available today. If you want high density, 128 gigabit NVM with faster speed than NAND, you have Optane 3D XPoint that are available multiple flavors and applications. These should be the focus of investment in data centers. In summary, the memory product lifecycle tells us what is now versus what is someday. MRAM, we have available for a cache for SSD, HDD and storage. You have it for NVDIMMs without need for power or backup, you have it for SRAM or eDRAM replacement for level four cache, and it's available for NOR replacement in embedded technologies, and actually it's crossed over right now on cost and performance over NOR.
24:19 MW: We're expecting to have $100 million in revenue in 2022 for discrete products. PCM 3D XPoint Optane is available for fast SSDs, high-density persistent memory, large main memory, all of those capabilities where you either want persistent non-volted memory or where you want a larger main memory then you can get with DRAM. Now we're expecting to have greater than 1 billion dollars in annual revenue going forward. Other technology, stage one through five technologies, are too far away to impact data center now. So, we can follow those, but the effort in time and plans should be based around these technologies that we have today. That's all I have, and again you have my contact information here. Thanks.