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3D Flash is Star of the 2013 Flash Memory Summit

The eighth annual Flash Storage Summit in Santa Clara, Calif., was once again an interesting mix of solid-state builders and buyers. While much of the exhibit hall featured exhibitors showing off components and testing gear in hopes of snagging OEM deals, there were still plenty of vendors with end-user—or close to end-user—products to browse.

 There weren’t a lot of enterprise product announcements that we hadn’t already covered on, but the real “star” of the show is a new flash architecture that should be showing up in products soon. The technology is called 3D NAND flash. It was described in a keynote presentation given by Samsung’s Dr. E.S. Jung, executive vice president and general manager of their semiconductor R&D center. The concept of 3D flash is analogous to the perpendicular recording technique that’s been used to dramatically increase the capacity of hard disk drives.

 The goal of the 3D architecture is to solve some of the problems that currently dog NAND flash as flash lithography gets denser. As the cells that store data on flash chips get closer and closer the likelihood of interference among cells becomes greater, which can affect the reliability and performance of the flash. With 3D, cells still reside next to each other, but expansion is achieved by stacking cells. The stacked cells can keep their distance from each to lessen the likelihood of interference while still increasing the chip’s capacity.

 Jung said that Samsung has been able to create architectures with 24 layers of cells to create 128 Gb chips; he foresees using this technique to ultimately build 1 Tb chips. He said that 3D technology will yield 10X endurance, use about half the power of traditional side-by-side cell architectures, run about 20% faster and be 50% smaller.

 There are a number of other companies working on 3D flash designs, including Toshiba. Joel Hagberg, , vice president of marketing for Toshiba’s storage products business unit, said there are number of different approaches to 3D flash that Toshiba is currently considering. In another keynote, Gil Lee of Applied Materials described some of the challenges of turning 3D flash into a product by making the transition into manufacturing. Lee noted that the manufacturing process wouldn’t require “cutting edge lithography” but would need other modifications to current processes.

 Several flash chip vendors indicated that we could expect to see wider production of products based on 3D NAND flash technology in 2014.

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