The new Jasper Forest processors build on the Intel Xeon processor 5500 series for servers, code-named Nehalem.
Jasper Forest will add storage processing features to the Nehalem base, potentially improving throughput for storage systems as well as raw processor performance. It will also reduce power requirements by consolidating up to five chips and ASICs previously required to run a storage system down to two with the addition of an embedded PCIe bus, embedded RAID controller and a Non-Transparent PCIe Bridge for failover between controllers onto the Jasper Forest processor. A separate 3420 chip will be required for host and disk I/O over Fibre Channel (FC) or Ethernet.
Jasper Forest will allow DRAM memory to be placed into a low-power state through its memory controller to optimize it for battery backup in the event of a failure. That's a new capability for Intel processors overall, Bobroff said.
While it's being previewed by Intel this week, and Bobroff said storage OEM partners have had Jasper Forest chip samples "for quite some time," Intel executives said GA won't come until early next year. It remains unknown how storage controller designs will use the new capabilities in systems shipped to end users.
Jim McGregor, chief technology strategist at Scottsdale, Ariz.-based In-Stat Market Research, said he sees Jasper Forest having the most benefit for high-end network-attached storage (NAS) systems. "Normally you have processing improvements with the release of new chips, but Jasper Forest will also speed throughput," he said. "Having everything on one chip will also lower memory latency."
Tom Becchetti, an enterprise storage admin who uses systems from EMC Corp. and NetApp Inc., said he's looking forward to seeing what plans storage vendors have for the chip. "NUMA is huge, especially as far as scaling memory," said Becchetti, who asked that his company remain unidentified because of internal policies that prevent him from representing it in the media. "Now there will be a whole bunch of addressable memory available to storage operating systems, and the question is how storage vendors will use it."
Becchetti said he hoped NetApp would be able to use it to boost native filer addressable memory beyond 4 GB and to support high performance in its scale-out operating system, Data Ontap 8. He added that he's excited for the possibilities with EMC's Symmetrix V-Max, which switched from proprietary IBM ASICs to Intel chips with its release this spring.
"EMC probably knew this was coming and that's why they made the switch," Becchetti said. (EMC also hired an Intel executive to serve as the new head of its storage division this week.)
With more addressable memory and higher throughput performance, V-Max systems could be logically carved up into more partitions, Becchetti said. "Deduplication could potentially run much faster in everybody's subsystem," he added.