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HDS reinvents high-end arrays
by Rich Castagna
Issue: Sep 2004
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HDS USP1100 vs. Lightning 9980V

The product line
There are three models in the USP line--the USP100, 600 and 1100. Their architecture is similar and they range from one to four frames. The entry- and mid-level versions are upgradeable and can ultimately be configured to the capacity and performance level of the top-of-the-line USP1100 model. Disk options for all three USPs include 73GB and 146GB drives, with the 300GB disk expected to be available before the end of the year.

All are built around the U-Star architecture--previously known as Hi-Star--the key to HDS' claims of vastly improved performance. Like earlier incarnations of HDS' crossbar switch architecture, the U-Star architecture connects front-end ports to back-end controllers and disks to cache. This iteration includes upgraded processors, and features twice the number of data paths compared to the current Hi-Star implementation in HDS' Lightning systems; U-Star can also handle four times the number of concurrent cache operations. HDS says these improvements represent an expansion of the existing architecture, which has the capacity to be enhanced even further. (To see some of the key metrics comparing the performance of the USP1100 to the Lightning 9980, see sidebar.)

The total bandwidth refers to both the cached bandwidth and control bandwidth. For example, the USP1100's 81GB/sec total bandwidth includes 68GB/sec dedicated to data, with the remainder--13GB/sec--dedicated to control functions. Total bandwidth ratings for the USP100 and USP600 models are 23.5GB/sec and 40.5GB/sec, which also represent substantial improvements over the Lightning 9980V. HDS says all of this adds up to approximately four times the performance of comparable Lightning models. "It's about 4X in everything," says Mikkelsen. "It's going to scale pretty high."

To provide some additional context for these figures, EMC's DMX 3000, with its Direct Matrix Architecture, boasts 128 direct data paths, 32 of which can operate concurrently at 500MB/sec each, yielding a total throughput of 16GB/sec.

All of the USP1100 specs add up to performance that HDS says tops out at almost 2 million IOPS. If that figure bears the scrutiny of real-world testing of production units, it would give the USP1100 a substantial advantage--at least on paper--over the competition. But array performance statistics can be misleading, and will vary significantly, depending on testing environments. Testing with standard benchmarks such as those provided by the Storage Performance Council (SPC), might yield comparable performance numbers, but some vendors, such as EMC, keep performance numbers under wraps. Still, even under controlled conditions, comparing storage arrays' performance is a dicey affair.

Two million IOPS may, indeed, push the bounds of credibility, and HDS concedes that it's a theoretical limit. But the company says it isn't alone in the industry when it comes to publishing theoretical performance numbers. "I think all the storage vendors post those," says Mikkelsen, adding that practical limitations depend on many variables in specific storage environments and a realistic limit is "all over the map."
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